# Carol\_Jerotich - Hardware Engineering (Level 1) Pathway

**URL:** <http://staging.stemaway.com/t/carol-jerotich-hardware-engineering-level-1-pathway/8666>\
**Category:** Hardware Engineering (CE) 2021\
**Created:** [July 3, 2021, 4:42pm UTC](http://staging.stemaway.com/t/carol-jerotich-hardware-engineering-level-1-pathway/8666 "2021-07-03T16:42:14Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![Carol\_Jerotich](https://d3rzmptxz7fqzy.cloudfront.net/user_avatar/staging.stemaway.com/carol_jerotich/32/3896_2.png) [@Carol\_Jerotich](http://staging.stemaway.com/u/Carol_Jerotich)\
**Post date:** [July 3, 2021, 4:42pm UTC](http://staging.stemaway.com/t/carol-jerotich-hardware-engineering-level-1-pathway/8666/1 "2021-07-03T16:42:14Z")

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**Week 1 & 2**

_Tools_

- FPGA

- Github

- Jupyter Notebooks

_Technical Skills_

- Got familiar with Git/Github and Jupyter Notebooks

- Got familiar with FPGA

- Learned the self assessment guidelines

_Soft Skills_

- Self -initative,teamwork,Self-drive,Communication

_Achievements_

- Watched a training session on Git/Github

- Began using Jupyter Notebooks

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<div class="post-metadata">

**Author:** ![Carol\_Jerotich](https://d3rzmptxz7fqzy.cloudfront.net/user_avatar/staging.stemaway.com/carol_jerotich/32/3896_2.png) [@Carol\_Jerotich](http://staging.stemaway.com/u/Carol_Jerotich)\
**Post date:** [July 7, 2021, 2:21am UTC](http://staging.stemaway.com/t/carol-jerotich-hardware-engineering-level-1-pathway/8666/2 "2021-07-07T02:21:24Z")

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**Week 3**

_Tools_

- PYNQ
- FPGA
- Git /Git hub
- Jupyter Notebooks

_Technical skills_

- Got more practice with Git/Github
- Got more familiar with Jupyter Notebooks

Soft Skills

- Logical-thinking
- Trouble -shooting
- Time-management